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As a result, another approach to building SANs using TCP/IP is gaining traction. Because IP is a mature and ubiquitous network protocol, it delivers a lower cost of ownership and is not plagued by the interoperability problems of Fibre Channel.

Samsung Electronics and Infineon Technologies AG already have ramped up DDR PC-333 yields by using their 0.13- and 0.14-micron processes. Hynix Semiconductor Inc. is converting its process geometry to 0.13 micron for DDR PC-333 production. Micron Technology Inc. is aggressively migrating to the 0.11-micron geometry to maximize its yields for DDR PC-333.

As a result, another approach to building SANs using TCP/IP is gaining traction. Because IP is a mature and ubiquitous network protocol, it delivers a lower cost of ownership and is not plagued by the interoperability problems of Fibre Channel.

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As a result, another approach to building SANs using TCP/IP is gaining traction. Because IP is a mature and ubiquitous network protocol, it delivers a lower cost of ownership and is not plagued by the interoperability problems of Fibre Channel.

Samsung Electronics and Infineon Technologies AG already have ramped up DDR PC-333 yields by using their 0.13- and 0.14-micron processes. Hynix Semiconductor Inc. is converting its process geometry to 0.13 micron for DDR PC-333 production. Micron Technology Inc. is aggressively migrating to the 0.11-micron geometry to maximize its yields for DDR PC-333.

As a result, another approach to building SANs using TCP/IP is gaining traction. Because IP is a mature and ubiquitous network protocol, it delivers a lower cost of ownership and is not plagued by the interoperability problems of Fibre Channel.

Wingren predicted that video telephony-enabled handsets will start to emerge in Europe this summer,” creating a high-volume market.

The motor control kernel in Microchip's PIC18F line, meanwhile, claims to ensure quick and easy development by utilizing standard application programming interfaces. On-chip pulse-width modulation (PWM) provides speed control for single-phase induction motors. The PIC18FXX39 family has what Microchip calls Programmable Motor Processor Technology motor control that provides modulated output over a range of 0 to 127 Hz.

Skyworks, Woburn, Mass., was formed last June as the result of a merger between Alpha Industries Inc. and Conexant Systems Inc.'s wireless communications business. Skyworks is focused on providing front-end modules, RF subsystems and cellular systems to wireless handset and infrastructure customers worldwide.

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Samsung Electronics and Infineon Technologies AG already have ramped up DDR PC-333 yields by using their 0.13- and 0.14-micron processes. Hynix Semiconductor Inc. is converting its process geometry to 0.13 micron for DDR PC-333 production. Micron Technology Inc. is aggressively migrating to the 0.11-micron geometry to maximize its yields for DDR PC-333.

As a result, another approach to building SANs using TCP/IP is gaining traction. Because IP is a mature and ubiquitous network protocol, it delivers a lower cost of ownership and is not plagued by the interoperability problems of Fibre Channel.

Wingren predicted that video telephony-enabled handsets will start to emerge in Europe this summer,” creating a high-volume market.

The motor control kernel in Microchip's PIC18F line, meanwhile, claims to ensure quick and easy development by utilizing standard application programming interfaces. On-chip pulse-width modulation (PWM) provides speed control for single-phase induction motors. The PIC18FXX39 family has what Microchip calls Programmable Motor Processor Technology motor control that provides modulated output over a range of 0 to 127 Hz.

As a result, another approach to building SANs using TCP/IP is gaining traction. Because IP is a mature and ubiquitous network protocol, it delivers a lower cost of ownership and is not plagued by the interoperability problems of Fibre Channel.

Wingren predicted that video telephony-enabled handsets will start to emerge in Europe this summer,” creating a high-volume market.

The motor control kernel in Microchip's PIC18F line, meanwhile, claims to ensure quick and easy development by utilizing standard application programming interfaces. On-chip pulse-width modulation (PWM) provides speed control for single-phase induction motors. The PIC18FXX39 family has what Microchip calls Programmable Motor Processor Technology motor control that provides modulated output over a range of 0 to 127 Hz.

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Wingren predicted that video telephony-enabled handsets will start to emerge in Europe this summer,” creating a high-volume market.

The motor control kernel in Microchip's PIC18F line, meanwhile, claims to ensure quick and easy development by utilizing standard application programming interfaces. On-chip pulse-width modulation (PWM) provides speed control for single-phase induction motors. The PIC18FXX39 family has what Microchip calls Programmable Motor Processor Technology motor control that provides modulated output over a range of 0 to 127 Hz.

The motor control kernel in Microchip's PIC18F line, meanwhile, claims to ensure quick and easy development by utilizing standard application programming interfaces. On-chip pulse-width modulation (PWM) provides speed control for single-phase induction motors. The PIC18FXX39 family has what Microchip calls Programmable Motor Processor Technology motor control that provides modulated output over a range of 0 to 127 Hz.

Skyworks, Woburn, Mass., was formed last June as the result of a merger between Alpha Industries Inc. and Conexant Systems Inc.'s wireless communications business. Skyworks is focused on providing front-end modules, RF subsystems and cellular systems to wireless handset and infrastructure customers worldwide.

And the details are nasty. Unlike digital IP blocks that can be completely specified by propagation delay and fan-out, analog blocks are defined by dozens of key parameters, said Masao Hotta, chief engineer and general manager of the mixed-signal design group at Hitachi Ltd. (Gunma-Ken, Japan). While Hitachi's most advanced system-on-chip (SoC) designs are constructed in 0.18-micron CMOS, the A/D and D/A blocks most frequently reused are in 0.35-micron geometries.

Carl Roberts, fellow and director of advanced packaging at Analog Devices Inc., Norwood, Mass., said that lead-frame chip-scale packaging (LFCSP), commonly called QFN, QLP, or MLP, will substantially displace the leaded SOIC family over the next three to five years. Roberts said the biggest immediate advantage is size. A typical product packaged in an LFCSP can be accommodated in a package 65% to 70% percent smaller than an SOIC.